Senior High-Speed Signal Integrity/SerDes system Engineer (M/F)

Company Adoc Talent Management is looking for a Senior High-Speed Signal Integrity/SerDes System Engineer (M/F) , for a leading global ICT company specializing in Cloud and AI, telecommunications, consumer, and mobile businesses, to support the development of next generation High-speed systems. The company is a well-known multinational corporation, and its research center in Grenoble is expanding its team focused on high-speed technology research. Missions As a Senior High-Speed Signal Integrity/SerDes System Engineer, you will work for the High-Speed High-Frequency team from the Board Engineering department in the Grenoble Research Center. You will be responsible for the high-speed (112Gbps+), interconnection technology innovation of ICT products: Lead high-speed SerDes systems architecture, design, simulation; Lead high-speed SerDes system experimental validation and correlation with simulation results; Co-development with the team in China: technical review, regular reporting, project chartering; Technology roadmap and projects planning for High-speed interconnection, technical insights into high-speed systems. You have proven experience with generations of technologies such as 28, 56, 112, and 224 Gbps. You have a solid understanding of strict manufacturing constraints and industrial operations. You will initiate projects with external partners and/or contribute to conferences. The position offers a wide range of tasks and promising career prospects for candidates with a strong network in the field and specialized technical expertise. It is available immediately as a permanent position (CDI) in Grenoble. Profile You have a Master's degree or above, PhD preferred, majoring in Electrical Engineering, Information Technology, Communication Engineering, Electromagnetic Science, etc. You have experience with the industrial ecosystem and have accumulated 8 years of experience in a similar position. In other words, you meet the following criteria: In-depth knowledge and extensive experience in system hardware architecture design of telecom/communication products; Extensive experience of 56Gbps and beyond high-speed product/prototype development; successful experience in 56Gbps+ product delivery; Excellent knowledge of high-speed SerDes architecture, Rx/Tx SerDes PHY, Tx/Rx equalization techniques, CDR, and corresponding challenges at DSP level; Familiarity with key high-speed serial hardware: such as SerDes, high-speed ASIC, package, DSP, PCB, and connector; Good skills in high-speed serial links lab experiments/prototyping (real-time oscilloscope, VNA…) and correlation with simulation results; Knowledge of industry standards IEEE 802.3/OIF-CEI standards, Common Electrical I/O (CEI)-224G, or InfiniBand. Job Tools / Technical Work: High-speed SerDes modelling and simulation: experience in Python (preferred), Matlab, Verilog-A, or ADS; Signal integrity tools: HFSS, CST. You are a technology enthusiast with curiosity, ability, and motivation to make significant contributions in your field of expertise. You are fluent in English with great intercultural social and communication skills, and the ability to work in international teams. If you are interested, please send your application to Adoc Talent Management as soon as possible (www.adoc-tm.com). #J-18808-Ljbffr