Research Engineer in component Security H/F

Research Engineer in Component Security H/FRéférence: 2024-31651Leti is a CEA Tech's technological research institute. Its mission is to create value and innovation with its industrial partners. It links fundamental research and the production of micro and nanotechnologies with the aim of improving everyone's quality of life. With a portfolio of 2800 patents, Leti designs advanced solutions to improve the competitiveness of its industrial partners: large groups, SMEs, or startups. Located in Grenoble (38), Leti has more than 1800 researchers and has offices in the US and Japan.The System department operates a service in charge of the Security of Electronic Systems and Components (SSSEC), a major player in CEA-Leti's activity and overall security offering. This service is particularly involved in the assessment of vulnerabilities and the design of secure technologies and systems in very fast-growing application areas. Within this service, the Component Security Laboratory (LSCO) develops innovative technological IPs for secure components within the constraints of performance, consumption, and security in the face of physical attacks. It is structured around 3 themes: the generation of TRNG and PUF, cryptography (classical, post-quantum, and quantum), and the security of processors.DomaineContratCDDResearch Engineer in Component Security H/FCadreThe position concerns the implementation of hardware countermeasures in processor architectures based on the RISC-V ISA.Responsibilities:RTL implementation, verification, and documentation of security IPs, then their integration into RISC-V processors emulated on FPGA.Verification of CPU operation before and after integration of countermeasures.Development of demonstrator around the developed countermeasure.Participation in the scientific dissemination of the team's research results (contributions to publications in international conferences) and in the promotion of our innovations (drafting of patents).Interaction with other CEA teams on cross-functional projects.In carrying out your mission, you will be led and supported to develop expertise in the following areas:Processor architecture and its implementation.Hardware security.Digital design flow and advanced verification of the developed IPs.To carry out your mission, you will benefit from a leading environment at CEA LETI in the field of hardware security. You will also join a dynamic team at the heart of the physical object security ecosystem in France.Qualifications:You hold a doctorate or an engineering/master’s degree in digital design with:Good knowledge of design and FPGA tools and flows (Vivado, QuestaSim, Verilator, etc.).A good understanding of one or more RTL description languages: VHDL, Verilog, and/or SystemVerilog.An ability to lead a project independently.Desired experience and/or skills:Experience in development and validation of FPGA hardware architecture.Knowledge or experience in hardware architecture or hardware security.Software development tools and approaches: version management (Git), compilation, testing strategies.Programming skills, preferably with proficiency in C/C++ and/or Python.SiteGrenoble #J-18808-Ljbffr